CPU Module

Contains the Z80 CPU and all the connections to the system bus. A LED is also present to show when the CPU has been halted (usually via the HALT command).

graph TD subgraph System Core SYSBUS(System Bus) -.- POWER(Power Module) SYSBUS -.- CLOCK(Clock Module) SYSBUS === CPU(CPU Module) SYSBUS -.- RAM(RAM Module) SYSBUS -.- ROM(ROM Module) IO(I/O Bridge) -.- SYSBUS end style SYSBUS fill:#fff,stroke:#333; style CPU fill:#f96,stroke:#333,stroke-width:4px;

These are three control lines that are configured in a default state of high: /RESET, /INT and /WAIT. The idea being that the CPU module holds these pins in the high state, and if another module or sub component wants to set them low they can without having to worry about resetting it back to the high state.